Recently, VRM has been applied in various electronic products, especially portable devices, to provide a stable supply voltage. It is a stringent challenge on the VRM transient. For example, Intel's road map shows that the VRM for a central processing unit (CPU) needs very tight regulation. Active voltage position (AVP) technique is widely used in pulse width modulation (PWM) converters, and active droop control is a popular way to achieve adaptive voltage position for a VRM. However, the output voltage of a VRM will overshoot as loading release and may damage the system thereby. One way to improve this overshoot is to increase the output capacitors coupled to the output of the VRM or reduce the equivalent series resistance (ESR) Rc of the output capacitors Co. Unfortunately, increasing the capacitor number will increase the size and cost of a VRM. In the VRM system, buck PWM is a popular system. FIG. 1 shows a typical buck PWM output stage of a VRM 100 and for simplification, the other portion of the VRM 100 is not shown. In the VRM 100, signals U and L are used through drivers 106 and 108 to switch a pair of switches 102 and 104 coupled between an input voltage Vin and ground GND to thereby produce an inductor current IL flowing through an inductor L to charge an output capacitor Co to further produce an output voltage Vout to supply for a load 109. FIG. 2 shows an ideal loading release in VRM condition and real output voltage Vout of the VRM 100 in a load transient. In FIG. 2, waveform 110 represents the inductor current IL, waveform 112 represents the output voltage Vout of the VRM 100 without using AVP technique, waveform 114 represents the output voltage Vout of the VRM 100 in an ideal loading release, and waveform 116 represents the output voltage Vout of the VRM 100 using active droop control. When the load 109 to the VRM 100 changes from light to heavy at time T1, the inductor current IL instantly increases to a higher level as shown in the waveform 110, and the output voltage Vout of the VRM 100 will drop down rapidly and then recover to the original level gradually, as shown in the waveform 112. Until the load 109 changes from heavy to light at time T2, the inductor current IL instantly decreases back to the original level as shown in the waveform 110, and as shown in the waveform 112, if no AVP technique is used, the output voltage Vout increases instantly and then recovers to the original level gradually. In the load transient, the spike ΔV of the output voltage Vout may be so large to damage the load 109.
To reduce the spike ΔV of the output voltage Vout resulted from a load transient, an AVP technique is employed, by which the output voltage Vout is maintained at the lower level when the load 109 to the VRM 100 changes from light to heavy at time T1, as shown in the waveform 114, until time T2 to recover to the original level when the load 109 changes from heavy back to light. As shown in the waveform 114, the spike ΔV′ of the output voltage Vout is almost half of the spike ΔV in the waveform 112. However, the waveforms 114 is only present under an ideal condition, which means that the output capacitor Co is large enough to absorb the energy released from the inductor L as loading release. In this case, the output voltage Vout will not overshoot and will not damage the system thereby. On the contrary, in most real cases, there will not be very large output capacitor Co in a system, especially in a handheld product, such as notebook computer and personal digital assistant (PDA). If the output capacitor Co is not large enough, the inductor energy cannot be absorbed instaneously as loading release, and the output voltage Vout will overshoot as shown in the waveform 116, which may damage the load 109.
Therefore, it is desired an overshoot suppression circuit for a VRM.